GateLab

FPGA development on the Mac. From first launch to a blinking LED in 25 seconds.
GateLab is a native macOS IDE for the open-source FPGA toolchain: Yosys, nextpnr, openFPGALoader and Icarus Verilog. Install the toolchain with one click, plug in your board, pick an example, and press Build & Program. No terminal, no virtual machine, no configuration files. And when you're ready to go further, an AI coding agent writes, simulates and fixes your HDL with you.
Available now
You can buy now GateLab at license.fpga.ch/buy
Downlaod the latest version at downloads.fpga.ch
Getting started
- One-click install of a tested OSS CAD Suite toolchain, with versions selectable per project
- Automatic USB board detection and chip identification
- Starter boards: iCEBreaker, iCESugar-nano, Tang Nano 9K, Cologne Chip GateMate EVB, Colorlight i9
- Project templates: blinky, button to LED, UART echo, PWM, counter with testbench
Design and build
- Supports Lattice iCE40 and ECP5, Gowin, and Cologne Chip GateMate
- Projects based on the FPGA part, with optional board definitions
- Fast editor with syntax highlighting for Verilog/SystemVerilog and all constraint formats
- Live design hierarchy, with missing modules flagged as you type
- Synthesis, place & route and programming (SRAM and flash) in one step
- Clear error messages, resource usage and timing results, RTL netlist viewer
Boards and pins
- Board packages from a signed online index, community-maintained on GitHub
- Board editor for your own PCBs, or import from an existing constraints file
- Pin planner with conflict checking
Simulation
- Icarus Verilog with PASS/FAIL testbenches
- Built-in waveform viewer
AI coding agent
- Built-in agent panel powered by Claude Code, using your own Claude account
- Writes and fixes HDL, creates testbenches, runs builds and simulations
- Every change shown as a diff for approval, with one-click revert
- "Fix with Claude" directly from build errors
- Also works with Claude Code in Terminal or VS Code
Hardware debug
- Live pin view via JTAG boundary scan, with signal names from your design
- Pin activity capture straight into the waveform viewer
- Supported on the GateMate EVB and Tang Primer 20K
Always current
- Automatic app updates, with a beta channel for early features
Coming soon
- Embedded logic analyzer: see internal signals at full speed, side by side with your simulation
- Core library: tested, ready-to-use building blocks (UART, SPI, I²C, FIFOs, PWM, video timing) plus small RISC-V CPUs such as PicoRV32, measured on every supported FPGA family
- rpjtag: our own USB JTAG adapter for fast boundary scan and programming
- Board bring-up tests: check every connection on a new PCB via JTAG, before your design is even finished
- More boards from the community
